A high voltage semiconductor device typically comprises a termination region which electrically isolates the device from the surrounding substrate and/or from the device's package. The termination region must ensure that the active area of the device is protected from high voltages, and that the device breakdown voltage of the device is as high as possible.
For high voltage devices such as DMOSFETs or IGBTs, a lightly doped drift region may be terminated in such a way as to ensure the optimum distribution of field or potential lines which is important to achieve the full voltage rating of the device. In order to be effective, such a termination area should preferably have a higher voltage-withstanding capability than the interior (active) area of the device.
Electrical termination can be achieved by dielectric materials or/and by reverse-biased pn-junctions. Under dielectric isolation, a dielectric insulator material such as an oxide of silicon may be used, in which case electrical termination may be achieved by forming oxide-filled trenches in the termination area surrounding the device's active area. Such termination trenches may be effective at distributing the potential or field lines laterally through the substrate body, but may leave the charge and potential distribution at the surface relatively uncontrolled.
Alternatively, a junction isolation termination may be used, in which reverse-biased p-n junctions help to achieve the required distribution of field or potential lines through the termination area. Surface guard-rings of opposite doping to the drift region may be used, for example, to distribute the potential across the termination area near the surface of the substrate. However, such termination arrangements are less effective at preventing crowding of the potential lines in the substrate body near the surface. Furthermore, such prior art termination arrangements typically either involve extra fabrication steps and/or masks, or the fabrication process may impose limitations on the geometries and/or configurations of the termination elements.
US 2008/042172 A1 refers to a prior art MOS transistor, which comprises trench gates in the active cell area and termination trench gates in the termination area, which are surrounded by one contiguous p doped layer.
In US 2009/090968 A1 a prior art MOS device is described having in the termination region p guard rings, which are covered by a field plate electrode.